Published on December 2018 | Low Power Electronics, Tunnel FET, Nanoelectronics

Rigorous Study of Double Gate Tunneling Field Effect Transistor Structure Based on Silicon”

Increased static and dynamic power dissipation in the integrated circuits (ICs) are the main obstacle for growing demands of smart phones and laptops, which require semiconductor devices having low power operation. As the conventional MOSFET has a thermodynamic limit of 60 mV/decade at 300 K on subthreshold slope (SS), so the device based on the mechanism other than diffusion over a thermal barrier came into existence. In this regard, Tunnel-FET (TFET) has emerged as a promising replacement. Due to its lower subthreshold slope (