Published on July 2021 | Band-to-band tunneling (BTBT) · Analog · Transient · TFET · Miller capacitance · Verilog A model · Symica D

Investigation of Analog Parameters and Miller Capacitance Affecting the Circuit Performance of Double Gate Tunnel Field Effect Transistors

TCAD Simulations for 30 nm double gate tunnel field effect transistor (DGTFET) reports steeper subthreshold swing, SS ~ 15 mV/dec, ION ~ 10–4 A/μm, and low off-state current IOFF ~ 10−15A/μm as desirable parameters for low voltage applications. The unity gain frequency (f T) increases with V gs and maximizes at 5.2 × 1011 Hz for V gs = V ds = 0.7 V. It is investigated that the gain-bandwidth product (GBP) also increase with Vgs and maximized at 2.63 × 1011 Hz for V ds = 0.7 V at V gs = 0.6 V. Transconductance frequency product (TFP) increases initially with V gs (0–0.7 V) and maximizes at 4.46 × 1011 Hz/V for V ds = 0.7 V. Higher value of V ds results in better response time of the DGTFETs, i.e., increasing V ds from 0.1 to 0.8 V, the transit time (tr) of the electron decreases from 4 to 0.1 ps resulting faster switching operation. Transient performance of DGTFETs reports that at supply voltage (V DD) = 0.7 V, increasing the load capacitance (CL, 10–200 pF) the total delay increases from 0.18 to 1.9 ns. It is also noticed that the % peak voltage overshoot (% V p) decreases from 42.8 to 2.14% due to decrease in computed values of miller capacitance (CMIL) from 11.27 to 4.32 fF. Maintaining CL = 15 fF, increasing V DD reports significant variation in voltage peak overshoot from 35 to 26.25% and total delay also decreases from 8 to 0.2 ns for V DD = 0.1–0.8 V